1. Technical Field
The present disclosure relates to a logical space organization method of a solid-state non-volatile storage device, and more particularly to a self-adaptive control method for logical strips based on a multi-channel solid-state non-volatile storage device.
2. Description of the Related Art
Hard disks are holding a dominant position in the field of storage devices. At present, solid-state non-volatile storage devices using semiconductor as storage medium, for example, flash memory storage devices gradually prevail. Characteristics of the non-volatile storage devices are illustrated below with a flash memory as an example. The flash memory has emerged suddenly in the storage market and had a rapidly rising market share because it may perform reading/writing and erasing many times and has the characteristics of high density, large capacity, low time consumption in reading and writing operations, non-volatility, and low power consumption. Especially in recent years, the increasingly mature production process, the gradually reduced cost price, and increasingly perfect back-end application technology of the flash memory have all greatly stimulated the flash memory market to a rapid expansion and made the flash memory gradually have equal shares with the hard disk in the storage market. However, due to problems in the manufacturing process, the flash memory has had some unavoidable defects since it came into being. For example, flash memory chips must perform the reading and writing operations in a unit of a sector, and an effective bandwidth of the reading and writing timing of each flash memory chip is no more than 40 MB. These defects have become obstacles to the rapid development of the flash memory. During the application of the flash memory, the flash memory medium can be utilized well only after eliminating the obstacles.
Along with the gradual improvement of the flash memory application technology, users require for increased reading and writing rates of the flash memory device. A read/write rate of an interface of a single-chip or single-channel flash memory device has already been far from satisfying the users' demands. Therefore, almost all the manufacturers of flash memory devices and flash memory controllers are researching and developing an operation mode of multi-channel flash memory chips. Such multi-channel flash memory device may perform flash memory operation on a plurality of channels simultaneously, so that the read/write rate of the interface of the flash memory device can be multiplied.
For such kind of multi-channel flash memory device, since the device normally executes instructions of a host and perform reading, writing, and erasing operations in parallel by a plurality of channels simultaneously, a problem of how to organize the read or written data and a problem of how to organize discrete physical storage spaces in the plurality of channels are inevitably to be faced, which, however, have not been well solved yet in the existing technologies.
One approach is fixing the number of storage units of each channel participating in operations, i.e., the number of storage units of each channel included in each logical strip of the device is fixed. As shown in FIG. 2, firmware in the flash memory designates that m pages in each of n channels of the flash memory device is included in a logical strip (in the figure, n is 4 and m is 2) according to reserved area information, where the page is a storage unit. All the logical strips are connected to form a continuous logical storage space, i.e., the storage space of the device seen by a user.
However, during usage, some problems gradually occur in such organization method. The flash memory device is used by various users, and different users have different purposes. For example, some users mainly use it for storing or frequently writing data. If each of the logical strips is relatively small so that flash memory chips of a plurality of channels are enabled for each writing operation, when data exists in a page with a destination address, effective data in a block including the page must be backed up first, the block is then erased, and the effective data along with the data of this operation is written. Therefore, for the writing process, the smaller a logical strip is, the more blocks to be erased are, which generally need more operation time and causes more consumption to the flash memory device. If each of the logical strips is relatively large so that one writing operation falls within one channel as much as possible, a block including a page with a destination address may only need to perform one erasing operation to realize this writing operation, which saves the time for writing to a large extent and effectively reduces the consumption to the flash memory device. For another example, if some users use the flash memory device only for backup of documents of relatively small data, the documents are read frequently during usage. In such case, if each of the logical strips is relatively large so that data are written into pages in only one channel in previous writing operations, only the one channel is enabled during a read operation, which fails to achieve the purpose of parallel operation and greatly reduces a reading rate of an interface of the device. If a logical strip is capable of being relatively small, the data will be distributed in a plurality of channels which will be simultaneously enabled during the read operation, and thus the reading rate of the interface of the device is multiplied.
It can be seen from the above that a relatively appropriate setting of a size for a logical strip has great influence on a flash memory device. However, the size of the logical strip of a present flash memory storage device has been fixed before using. Even if the device is used by users having different purposes, since the size of the logical strip is fixed, its reading and writing rates during the usage as well as the life span will be greatly affected. Therefore, how to solve the problem of setting the size of the logical strip will exert great influence on a multi-channel flash memory device.